%b8#h(#0apm,mustangapm,xgene-storm +7APM X-Gene Mustang boardcpus+cpu@000=cpuapm,potenzaarm,armv8I Mspin-table[cpu@001=cpuapm,potenzaarm,armv8I Mspin-table[cpu@100=cpuapm,potenzaarm,armv8I Mspin-table[cpu@101=cpuapm,potenzaarm,armv8I Mspin-table[cpu@200=cpuapm,potenzaarm,armv8I Mspin-table[cpu@201=cpuapm,potenzaarm,armv8I Mspin-table[cpu@300=cpuapm,potenzaarm,armv8I Mspin-table[cpu@301=cpuapm,potenzaarm,armv8I Mspin-table[interrupt-controller@78010000arm,cortex-a15-gicl}@Ixxx x   timerarm,armv8-timer0 soc simple-bus+clocks+refclk fixed-clockrefclkpcppll@17000100apm,xgene-pcppll-clockpcppllIpcppllDsocpll@17000120apm,xgene-socpll-clocksocpllI socpllDsocplldiv2fixed-factor-clock socplldiv2 socplldiv2qmlclkapm,xgene-device-clockqmlclkI csr-regqmlclkethclkapm,xgene-device-clockethclkI div-reg8# 1ethclkmenetclkapm,xgene-device-clockI csr-reg menetclksge0clk@1f21c000apm,xgene-device-clockI! csr-reg?sge0clkxge0clk@1f61c000apm,xgene-device-clockIa csr-reg?xge0clksataphy1clk@1f21c000apm,xgene-device-clockI! csr-reg sataphy1clk HdisabledO?Zhsataphy1clk@1f22c000apm,xgene-device-clockI" csr-reg sataphy2clkHokO?:Zhsataphy1clk@1f23c000apm,xgene-device-clockI# csr-reg sataphy3clkHokO?:Zhsata01clk@1f21c000apm,xgene-device-clockI! csr-reg sata01clkO?Zh9  sata23clk@1f22c000apm,xgene-device-clockI" csr-reg sata23clkO?Zh9  sata45clk@1f23c000apm,xgene-device-clockI# csr-reg sata45clkO?Zh9  rtcclk@17000000apm,xgene-device-clockI  csr-regO ?Zhrtcclkserial@1c020000Hok=serial ns16550aIt  Lreboot@17000014apm,xgene-rebootIserial@1c021000 Hdisabled=serial ns16550aIt  Mserial@1c022000 Hdisabled=serial ns16550aI t  Nserial@1c023000 Hdisabled=serial ns16550aI0t  Ophy@1f21a000apm,xgene-phyI!~ Hdisabled    phy@1f22a000apm,xgene-phyI"~Hok    phy@1f23a000apm,xgene-phyI#~Hok  sata@1a000000apm,xgene-ahciPI!!!!p  Hdisabled   sata-physata@1a400000apm,xgene-ahciPI@""""p Hok   sata-physata@1a800000apm,xgene-ahci@I### Hok  sata-phyrtc@10510000apm,xgene-rtcIQ Fethernet@17020000apm,xgene-enetHok0I enet_csrring_csrring_cmd <rgmiimdioapm,xgene-mdio+menetphy@3ethernet-phy-id001c.c915Iethernet@1f210000apm,xgene-enetHok0I!  enet_csrring_csrring_cmd sgmiiethernet@1f610000apm,xgene-enetHok0Ia` enet_csrring_csrring_cmd `xgmiichosenmemory=memoryI compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregenable-methodcpu-release-addr#interrupt-cellsinterrupt-controllerinterruptslinux,phandleclock-frequencyranges#clock-cellsclock-output-namesclocksclock-namesclock-multclock-divreg-namesdivider-offsetdivider-widthdivider-shiftcsr-maskstatuscsr-offsetenable-offsetenable-maskreg-shift#phy-cellsapm,tx-boost-gainapm,tx-eye-tuningdma-coherentphysphy-nameslocal-mac-addressphy-connection-typephy-handle