x8p(pZII RMU2 Board!zii,imx7d-rmu2fsl,imx7dchosen4,/soc/bus@30800000/spba-bus@30800000/serial@30890000aliases 8/soc/bus@30000000/gpio@30200000 >/soc/bus@30000000/gpio@30210000 D/soc/bus@30000000/gpio@30220000 J/soc/bus@30000000/gpio@30230000 P/soc/bus@30000000/gpio@30240000 V/soc/bus@30000000/gpio@30250000 \/soc/bus@30000000/gpio@30260000b/soc/bus@30800000/i2c@30a20000g/soc/bus@30800000/i2c@30a30000l/soc/bus@30800000/i2c@30a40000q/soc/bus@30800000/i2c@30a50000v/soc/bus@30800000/mmc@30b40000{/soc/bus@30800000/mmc@30b50000/soc/bus@30800000/mmc@30b600004/soc/bus@30800000/spba-bus@30800000/serial@308600004/soc/bus@30800000/spba-bus@30800000/serial@308900004/soc/bus@30800000/spba-bus@30800000/serial@30880000"/soc/bus@30800000/serial@30a60000"/soc/bus@30800000/serial@30a70000"/soc/bus@30800000/serial@30a80000"/soc/bus@30800000/serial@30a900001/soc/bus@30800000/spba-bus@30800000/spi@308200001/soc/bus@30800000/spba-bus@30800000/spi@308300001/soc/bus@30800000/spba-bus@30800000/spi@30840000/soc/bus@30400000/spi@30630000/soc/bus@30800000/usb@30b10000/soc/bus@30800000/usb@30b20000/soc/bus@30800000/usb@30b30000cpusidle-statespscicpu-sleep-wait!arm,idle-stated&26Gcpu@0!arm,cortex-a7Ocpu[_;]ol} speed_gradeGcpu@1!arm,cortex-a7Ocpu[_;]G=opp-table!operating-points-v2Gopp-792000000/4B@I !opp-996000000;]I !opp-1200000000G(I!clock-cki !fixed-clock-_:ckilGclock-osc !fixed-clock-_n6:oscG usbphynop1!usb-nop-xceiv} Mmain_clkYG.usbphynop3!usb-nop-xceiv}n Mmain_clkdYG0pmu!arm,cortex-a7-pmur \replicator !arm,coresight-static-replicatorout-portsport@0[endpoint Gport@1[endpoint Gin-portsportendpoint Gtimer!arm,armv7-timerr 0   soc !simple-busrfunnel@30041000+!arm,coresight-dynamic-funnelarm,primecell[0}J Mapb_pclkin-portsport@0[endpoint Gport@1[endpointG>out-portsportendpointGetm@3007c000"!arm,coresight-etm3xarm,primecell[0}J Mapb_pclkout-portsportendpointG funnel@30083000+!arm,coresight-dynamic-funnelarm,primecell[00}J Mapb_pclkin-portsport@0[endpointGport@1[endpointout-portsportendpointGetf@30084000 !arm,coresight-tmcarm,primecell[0@}J Mapb_pclkin-portsportendpointGout-portsportendpointG etr@30086000 !arm,coresight-tmcarm,primecell[0`}J Mapb_pclkin-portsportendpointG tpiu@30087000!!arm,coresight-tpiuarm,primecell[0p}J Mapb_pclkin-portsportendpointG interrupt-controller@31001000!arm,cortex-a7-gic  r  [11 1@ 1` G bus@30000000!fsl,aips-bussimple-bus[0@gpio@30200000!fsl,imx7d-gpiofsl,imx35-gpio[0 @A "G8gpio@30210000!fsl,imx7d-gpiofsl,imx35-gpio[0!BC" GBgpio@30220000!fsl,imx7d-gpiofsl,imx35-gpio[0"DE"-gpio@30230000!fsl,imx7d-gpiofsl,imx35-gpio[0#FG"JG(gpio@30240000!fsl,imx7d-gpiofsl,imx35-gpio[0$HI"bG9gpio@30250000!fsl,imx7d-gpiofsl,imx35-gpio[0%JK"tgpio@30260000!fsl,imx7d-gpiofsl,imx35-gpio[0&LM"watchdog@30280000!fsl,imx7d-wdtfsl,imx21-wdt[0( N}B .disabledwatchdog@30290000!fsl,imx7d-wdtfsl,imx21-wdt[0) O} .disabledwatchdog@302a0000!fsl,imx7d-wdtfsl,imx21-wdt[0*  } .disabledwatchdog@302b0000!fsl,imx7d-wdtfsl,imx21-wdt[0+ m} .disabledpinctrl@302c0000!fsl,imx7d-iomuxc-lpsr[0,5Genet1phyinterruptgrpC8G7timer@302d0000!fsl,imx7d-gptfsl,imx6dl-gpt[0- 7}..Mipgpertimer@302e0000!fsl,imx7d-gptfsl,imx6dl-gpt[0. 6}22Mipgper .disabledtimer@302f0000!fsl,imx7d-gptfsl,imx6dl-gpt[0/ 5}66Mipgper .disabledtimer@30300000!fsl,imx7d-gptfsl,imx6dl-gpt[00 4}::Mipgper .disabledkeypad@30320000!fsl,imx7d-kppfsl,imx21-kpp[02 P} .disabledpinctrl@30330000!fsl,imx7d-iomuxc[03Gecspi1grp`Ch$l,p(tYG'enet1grpPCh XDHLPT@,048<G4enet1phyresetgrpC$G6i2c1grp0CL@H@G,ledsgrpCTYGAuart2grp0C0y4yG)uart4grp0C0 y4yG-usdhc1grpCY YYYYG2usdhc3grpCDY@HYLYPYTYXY\Y`YdYlYG3iomuxc-gpr@30340000<!fsl,imx7d-iomuxc-gprfsl,imx6q-iomuxc-gprsysconsimple-mfd[04G+mux-controller !mmio-muxL_Gcsi-mux !video-muxm .disabledport@0[port@1[endpointG&port@2[endpointG#efuse@30350000!fsl,imx7d-ocotpsyscon[05}calib@3c[<Gfuse-grade@10[Ganatop@303600004!fsl,imx7d-anatopfsl,imx6q-anatopsysconsimple-mfd[0613Gregulator-vdd1p0d!fsl,anatop-regulatorzvdd1p0d 5O 5O.G!regulator-vdd1p2!fsl,anatop-regulatorzvdd1p2   .G"tempmon!fsl,imx7d-tempmonr 1@calibtemp_grade}snvs@30370000#!fsl,sec-v4.0-monsysconsimple-mfd[07Gsnvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lpL4} Msnvs-rtc .disabledsnvs-powerkey!fsl,sec-v4.0-pwrkeyL } Msnvs-pwrkeySta .disabledclock-controller@30380000!fsl,imx7d-ccm[08UV-}  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.disabledportsport@0[port@1[endpoint&Gpcie-phy@306d0000!fsl,imx7d-pcie-phy[0m .disabledG@bus@30800000!fsl,aips-bussimple-bus[0@spba-bus@30800000!fsl,spba-bussimple-bus[0spi@30820000 !fsl,imx7d-ecspifsl,imx51-ecspi[0 }Mipgper.okaydefault' (flash@0!jedec,spi-nor1-[spi@30830000 !fsl,imx7d-ecspifsl,imx51-ecspi[0  }Mipgper .disabledspi@30840000 !fsl,imx7d-ecspifsl,imx51-ecspi[0 !}Mipgper .disabledserial@30860000!fsl,imx7d-uartfsl,imx6q-uart[0 }Mipgper .disabledserial@30890000!fsl,imx7d-uartfsl,imx6q-uart[0 }Mipgper.okaydefault)serial@30880000!fsl,imx7d-uartfsl,imx6q-uart[0 }Mipgper .disabledsai@308a0000&!fsl,imx7d-saifsl,imx6sx-sai[0 _ }Mbusmclk1mclk2mclk37rxtx A**  .disabledsai@308b0000&!fsl,imx7d-saifsl,imx6sx-sai[0 ` }Mbusmclk1mclk2mclk37rxtx A* *  .disabledsai@308c0000&!fsl,imx7d-saifsl,imx6sx-sai[0 2 }Mbusmclk1mclk2mclk37rxtx A* *  .disabledcrypto@30900000 !fsl,sec-v4.0[0 0 [}Z Mipgaclkjr@1000!fsl,sec-v4.0-job-ring[ ijr@2000!fsl,sec-v4.0-job-ring[  jjr@3000!fsl,sec-v4.0-job-ring[0 rcan@30a00000$!fsl,imx7d-flexcanfsl,imx6q-flexcan[0 n}Mipgper F+ .disabledcan@30a10000$!fsl,imx7d-flexcanfsl,imx6q-flexcan[0 o}Mipgper F+ .disabledi2c@30a20000!fsl,imx7d-i2cfsl,imx21-i2c[0 #}.okay_default,pmic@8!fsl,pfuze3000[regulatorssw1a `2ZTfzjGsw1b `Tfzjsw2`:Tfsw3 -PTfswbstLK@N0vsnvsB@-TfvrefddrTfvldo1w@2Zfvldo2 5fvccsd+|2Zfv33+|2Zfvldo3w@2Zfvldo4w@2Zfeeprom@50 !atmel,24c04[Peeprom@52 !atmel,24c04[Ri2c@30a30000!fsl,imx7d-i2cfsl,imx21-i2c[0 $} .disabledi2c@30a40000!fsl,imx7d-i2cfsl,imx21-i2c[0 %} .disabledi2c@30a50000!fsl,imx7d-i2cfsl,imx21-i2c[0 &} .disabledserial@30a60000!fsl,imx7d-uartfsl,imx6q-uart[0 }Mipgper.okaydefault- rave-sp!zii,rave-sp-rdu2B@watchdog!zii,rave-sp-watchdogeeprom@a3!zii,rave-sp-eeprom[@ main-eepromserial@30a70000!fsl,imx7d-uartfsl,imx6q-uart[0 }Mipgper .disabledserial@30a80000!fsl,imx7d-uartfsl,imx6q-uart[0 }Mipgper .disabledserial@30a90000!fsl,imx7d-uartfsl,imx6q-uart[0 ~}Mipgper .disabledmailbox@30aa0000!fsl,imx7s-mufsl,imx6sx-mu[0 X} .disabledmailbox@30ab0000!fsl,imx7s-mufsl,imx6sx-mu[0 a} .disabledusb@30b10000!fsl,imx7d-usbfsl,imx27-usb[0 +}./ .disabledusb@30b30000!fsl,imx7d-usbfsl,imx27-usb[0 (}01hsichost .disabledusbmisc@30b10200$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc[0G/usbmisc@30b30200$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc[0G1mmc@30b40000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc[0 }V Mipgahbper+.okaydefault2@IQmmc@30b50000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc[0 }V Mipgahbper+ .disabledmmc@30b60000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc[0 }V Mipgahbper+.okaydefault3@gIuQspi@30bb0000!fsl,imx7d-qspi[0`{QuadSPIQuadSPI-memory k} Mqspi_enqspi .disableddma-controller@30bd0000!fsl,imx7d-sdmafsl,imx35-sdma[0 }Mipgahbimx/sdma/sdma-imx7d.binG*ethernet@30be0000!fsl,imx7d-fecfsl,imx6sx-fec[0int0int1int2pps0xvwy(}R*"Mipgahbptpenet_clk_refenet_out F+.okaydefault4+ rgmii-id5mdioethernet-phy@0default67[r8 9 G5usb@30b20000!fsl,imx7d-usbfsl,imx27-usb[0 *}:;.okayhostusbmisc@30b20200$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc[0G;ethernet@30bf0000!fsl,imx7d-fecfsl,imx6sx-fec[0int0int1int2pps0fdeg(}R*"Mipgahbptpenet_clk_refenet_out F+ .disableddma-controller@33000000&!fsl,imx7d-dma-apbhfsl,imx28-dma-apbh[3 0    '}G<nand-controller@33002000!fsl,imx7d-gpmi-nand[3 3@@{gpmi-nandbch bch}Mgpmi_iogpmi_bch_apbA<7rx-tx .disabled(etm@3007d000"!arm,coresight-etm3xarm,primecell[04 V=}J Mapb_pclkout-portsportendpoint>Gpcie@33800000!fsl,imx7d-pcie[3@O {dbiconfigOpciK0ՁO@@U zmsi_r } | { z}r+vMpciepcie_buspcie_physw)+d?%%%pciephyappsturnoff@ .disabledusbphynop2!usb-nop-xceiv} Mmain_clkYG:gpio-leds !gpio-ledsAdefaultled-debugzii:green:debug1 B heartbeat #address-cells#size-cellsmodelcompatiblestdout-pathgpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2i2c3mmc0mmc1mmc2serial0serial1serial2serial3serial4serial5serial6spi0spi1spi2spi3usb0usb1usb2entry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usphandledevice_typeregclock-frequencyclock-latencyclockscpu-idle-statesoperating-points-v2#cooling-cellsnvmem-cellsnvmem-cell-namescpu-supplyopp-sharedopp-hzopp-microvoltclock-latency-nsopp-supported-hwopp-suspend#clock-cellsclock-output-namesclock-names#phy-cellspower-domainsinterrupt-parentinterruptsinterrupt-affinityremote-endpointarm,cpu-registers-not-fw-configuredrangescpu#interrupt-cellsinterrupt-controllergpio-controller#gpio-cellsgpio-rangesstatusfsl,input-selfsl,pins#mux-control-cellsmux-reg-masksmux-controlsregulator-nameregulator-min-microvoltregulator-max-microvoltanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitfsl,tempmonregmaplinux,keycodewakeup-source#reset-cells#power-domain-cellspower-supply#io-channel-cells#pwm-cellsphy-supplyresetspinctrl-namespinctrl-0cs-gpiosspi-max-frequencyassigned-clocksassigned-clock-parents#sound-dai-cellsdma-namesdmasfsl,stop-moderegulator-boot-onregulator-always-onregulator-ramp-delaycurrent-speedzii,eeprom-name#mbox-cellsfsl,mu-side-bfsl,usbphyfsl,usbmiscphy-clkgate-delay-usphy_typedr_mode#index-cellsbus-widthfsl,tuning-stepfsl,tuning-start-tapno-1-8-vno-sdiokeep-power-in-suspendnon-removableno-sdreg-names#dma-cellsfsl,sdma-ram-script-nameinterrupt-namesfsl,num-tx-queuesfsl,num-rx-queuesassigned-clock-ratesphy-modephy-handlereset-gpiosdisable-over-currentdma-channelsarm,primecell-periphidbus-rangenum-lanesinterrupt-map-maskinterrupt-mapfsl,max-link-speedreset-namesfsl,imx7d-pcie-phylabellinux,default-trigger